The 74HC138D is a high-speed Si-gate CMOS 3-to-8 line decoder/demultiplexer, designed for decoding 3 binary address inputs into 8 mutually exclusive active-LOW outputs. It features three enable pins (two active-LOW, one active-HIGH) for easy expansion, operates between 2.0V and 6.0V, and is commonly used for memory chip selection.
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74HC138D SMD Nexperia
2026-05-04T10:58:11
The 74HC138D is a high-speed Si-gate CMOS 3-to-8 line decoder/demultiplexer, designed for decoding 3 binary address inputs into 8 mutually exclusive active-LOW outputs. It features three enable pins (two active-LOW, one active-HIGH) for easy expansion, operates between 2.0V and 6.0V, and is commonly used for memory chip selection.
2026-05-04T10:58:11
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